Multilayer circuit substrates are used to interconnect a large number of integrated circuit chips. Such substrates typically have a large number of signal lines between the chips as well as several layers of signal lines separated by interleaving dielectric layers. Via structures can electrically couple signal lines in different planes of the substrate. Because via structures can conduct electricity in a direction generally vertical to the planar direction of the substrate, they are sometimes called "z-connections". The signal lines and dielectric layers are typically made in a "build-up" process. In typical build-up process, conducting and dielectric layers may be formed sequentially by a variety of operations including metal deposition, photolithography, and etching. Build-up processes such as these involve many steps and are quite costly. Furthermore, a defect in the formation of one layer during the build-up process could potentially ruin the entire substrate. Current trends in the industry are toward increasing the density and decreasing the size of signal lines and via structures in the substrate. This, in turn, increases cost of the build-up process and increases the probability of defects.
Furthermore, current trends in the industry are also toward producing via structures having diameters less than about 200 .mu.m. Reliable via structures in multilayer circuit substrates can sometimes be difficult to form for apertures less than about 200 .mu.m in diameter, especially in a cost-effective manner. For example, via structures can be formed by depositing a slurry including a polymeric binder and conductive particles into an aperture in a dielectric layer. Conductive particles contact each other in the formed via structure and are bound by the binder which fills the interstices between the particles. The formed via structure can contact conductive pads disposed at opposite ends of the via structure, thus providing electrical communication between different planes in a substrate. One problem with this type of via structure is that the amount of conductive material which can be deposited in the aperture is dependent upon how efficiently the conductive particles are packed within the aperture. Conductivity relies on the contact between the particles, and the particles and mating pads or metallization on the aperture walls. The interstices between the conductive particles are filled with the binder which is non-conductive, thus limiting the conductivity of the via structure as a whole.
Accordingly, there is a need for reliable, efficient, and less expensive methods, materials, and structures for forming multilayer circuit substrates.